QEMU adds ARM64 guests on Microsoft Hypervisor accelerator

QEMU is gaining the ability to run aarch64 guests on Microsoft’s Hypervisor (MSHV) accelerator, so standard virt-machine VMs can use -accel mshv on hosts that expose the mshv Linux kernel module.

Until now the MSHV backend was effectively an x86 path. Microsoft engineers Aastha Rawat and Anirudh Rayabharam have refactored that code so architecture-neutral pieces (shared register hypercalls, accelerator init hooks, and common MMIO helpers also useful to HVF and WHPX) sit apart from the x86-specific MSR and interrupt logic. On top of that they added an ARM64 backend: vCPU register get/set through hypervisor hypercalls, -cpu host by reading ID registers from the partition, a run loop that emulates MMIO from ESR_EL2 syndrome data, and an in-kernel vGICv3 driven by the hypervisor’s virtual-interrupt assert hypercall. PSCI is advertised to guests as 1.3, matching what MSHV implements.

The practical result is a normal qemu-system-aarch64 -accel mshv -cpu host -M virt ... launch. Live migration is still missing, so this is a run-in-place story for ARM guests on the Microsoft hypervisor stack rather than a full feature parity drop. Rawat and Rayabharam are listed as maintainers for the new ARM64 MSHV CPU support.