AI-written mlx5 driver lands in VFIO selftests in a week

Jason Gunthorpe has posted a ten-patch series that adds Mellanox/NVIDIA ConnectX (mlx5) support to the kernel's VFIO PCI selftests, and he says almost all of it was produced by Anthropic's Claude in roughly four days of guided work.

VFIO selftests need real device drivers that can DMA-copy memory and raise MSI interrupts so the IOMMU and userspace driver paths get exercised end to end. Until now those helpers covered a short list of simpler accelerators and NICs. mlx5 is a much heavier target: bringing the HCA up, allocating protection domains and memory keys, and programming queue pairs is complex firmware choreography. Gunthorpe's driver does that for both PFs and VFs, then issues RDMA WRITE operations on a force-loopback queue pair so the NIC performs the memory copies the tests need. Completions can be armed to deliver MSI-X as well. Because mlx5 keeps a stable programming ABI, the same code is intended to work from ConnectX-5 through current silicon, provided firmware supports QP loopback.

On the netdev list Gunthorpe wrote that earlier VFIO selftest drivers took on the order of one to two months; getting one in a week was "pretty remarkable." He described a multi-session flow: study existing VFIO and rdma-core mlx5 code, prototype a standalone DMA memcpy program, then fold the result into the selftest framework patch by patch while repeatedly cleaning AI output. Claude used about 4.5 million output tokens across roughly thirty sessions and thousands of lines of planning notes. Patches carry Assisted-by credit for Claude Opus, with review or ack from David Matlack on several pieces.

The series also peels mlx5 interface macros and related helpers into headers the selftest can include without pulling in the full RDMA stack, and lets drivers declare how large a DMA region they need so mlx5's multi-megabyte firmware footprint is no longer capped by a fixed 2MB assumption.

If merged, ConnectX hardware becomes a first-class way to regression-test VFIO DMA and interrupt delivery on machines that already ship those NICs, and the submission is an early public data point for large-language-model assistance on intricate kernel device bring-up.